1. Field of the Invention
The present invention relates to a digital level indicating device suitable for use in compact disk (CD) players, digital audio tape recorders (DATs), etc.
In PCM record/playback equipment such as CD players and DATs, an analog audio signal is recorded on a recording medium in digital form and, during playback, a digital signal is converted to an analog signal and then output. FIG. 1 is a block diagram of a digital level indicating device which is used for monitoring a level of the digital signal in such equipment.
In FIG. 1, a converter circuit 1 converts a digital signal applied thereto to a digital absolute value signal representative of an absolute value of the digital input signal and then outputs the resultant absolute value signal. This absolute value signal is applied to a decoder 2 comprising a ROM, logic gates, etc. in which the input is subjected to logarithmic conversion for decibel (dB) indication and is also converted to an indicator signal suitable for visual display. An output from the decoder 2 is applied to a peak holder circuit 4 to detect and hold a peak value thereof. A synthesizer circuit 5 synthesizes, into a synthesized a signal delivered from the decoder 2 corresponding to an instantaneous level (absolute value) and another signal delivered from the peak holder circuit 4 corresponding to a peak level (absolute value). The synthesized indicator signal is supplied to a driver 7 which in turn drives a display 8, comprising a plurality of lamps, LEDs etc., in accordance with the indicator signal. Alternately, two drivers 7 and two displays 8 can be used and the synthesizer can be eliminated. As a result, both the instantaneous level and the peak level are indicated by the display 8.
By operating a selector 3 to switch the choices of resolution of the decoder 2 from one to another, the digital level can be indicated on the display 8 with an increment of 3 dB or 1 dB, for example.
As described above, since such a prior device is designed to peak-hold the output for the decoder 2, there arise drawbacks as follows. When the selector 3 is operated to select 1 dB resolution during an indication mode of 3 dB resolution, for example, the peak holder circuit 4 still holds the previous peak value which has been decoded with the preceding 3 dB resolution. Therefore, the peak value based on the selected new 1 dB resolution will not be indicated unless a value that is greater by about 3 dB than the previously held value is applied to the peak hold circuit 4. To avoid this, it has been required to provide a reset switch 6 associated with the peak holder circuit 4 and to turn on the reset switch 6 each time the selector 3 is so switched in order to once reset the holding status of the peak holder circuit 4.
FIG. 2 is a block diagram showing another prior example of the digital level indicating device.
An absolute value signal comprising n bits representative of an absolute value of the digital signal is applied to terminals 1, 2, 3 . . . n in one-bit to one-terminal relation, e.g., with the most and least significant bits (MSB and LSB) applied to the terminal 1 and to the terminal respectively. If the most significant bit which has a logic 1 (high) level is given by a signal applied to the terminal 2, for example, an associated OR circuit 24 delivers an output of logic 1. As a result, an inverter 35 delivers an output of logic 0 (low level) so that an electrical current passes through a resistor 55 from a predetermined voltage source (not shown) at +V to illuminate a light emitting diode 45.
An output of the OR circuit 24 is delivered to a following or lower OR circuit 25, an output of this OR circuit 25 is delivered to yet a lower OR circuit 26, and so on. With such operation repeated, all the light emitting diodes 46, 47 . . . lower than the light emitting diode 45 are illuminated.
The n-th bit data from the MSB is adapted to drive the light emitting diode indicative of -6 ndB. This permits a level of the digital signal to be indicated with an increment of 6 dB.
Decoders 11, 12, 13 . . . are provided to change the increment of level indication from 6 dB to 3 dB. With the data at the terminal 1 having the logic 0 level and the data at the terminal 2 having the logic 1 level, for example, when the data of logic 1 is applied to any one of the other terminals and has a value greater than 3 dB, the decoder 13 delivers an output of logic 1. Accordingly, an OR circuit 23 delivers an output of logic 1 and an inverter 34 delivers an output of logic 0 to thereby illuminate all the light emitting diodes lower than the light emitting diode 44.
In this way, the digital level can be indicated with an increment of 3 dB while the full scale is indicating the level of 0 dB.
As described above, the part of the decoder 2 for subjecting an absolute value signal to logarithmic conversion for decibel indication comprises the decoders 11, 12 . . . . The part of the decoder 2 for converting the log-converted signal to an indicator signal suitable for visual indication comprises the OR circuits 21, 22 . . . . The driver 7 comprises the inverters 31, 32 . . . , and the display 8 comprises the light emitting diodes 41, 42 . . . and the resistors 51, 52 . . . . With such a structure, the prior device has the accompanying disadvantage of being fixed in both the indication step and the resolution. Another disadvantage has been that it is capable of carrying out bar or dot indication with the light emitting diodes 41, 42 . . . but it is not adaptable to the case of indicating the decibel values in characters.